The manufacture of semiconductor-integrated chips is complicated. Layers and layers of materials are formed on the substrate to fabricate a wafer, which is to be diced into hundreds of dies and be packaged as chips. During the fabrication of the wafers, defects due to operational errors, equipment malfunctions, or the environmental uncertainty may occur in different layers of the wafer. The defects may cause bad dies in the finished wafers, and thus the yield of manufacture is reduced. To manage the yield more effectively, it is desirable to find out the defects and their origins as thoroughly and soon as possible.
Defect scan tools are commonly utilized to collect the defect data of each layer of the wafer. However, the typical defect data may only include sizes and locations of defects with respect to that layer. When the center of a given-size defect resides in a critical area, it will be found to result in a fault, e.g., a circuit short or a circuit open. Thus to determine whether a defect will causes a fault, a wafer is usually be inspected by the human eye to see if that defect falls into that critical area. And a yield map that indicates locations of defects falling into the critical area is obtained with respect to that scanned layer.
Nevertheless, the quantity of wafers manufactured everyday is too large to inspect each of them. Thus only some sampled wafers would be inspected while being manufactured, and certain problems causing defects may not be found immediately if the defected wafers are not chosen to inspect.
For each wafer, the wafer map that indicates locations of bad dies will not be obtained until probing performed at the end of the manufacture of the entire lot of wafers, where the a bad die is referred to a die having at least one fault. Then the problems causing low yield may not be recognized until this moment, and thus the cost is enormously raised.
To find out the defects and their origins as thoroughly and soon as possible, it is desirable to have a method and an apparatus thereof capable of, during the fabrication of a lot of wafers, producing the yield map of each layer and the wafer map of every wafer. Then the yield could be managed in real-time.